Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
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Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs
Fault Tolerance in Carbon Nanotube Transistors Based Multi Valued Logic
A High-Performance and Energy-Efficient Ternary Multiplier Using CNTFETs
OAK 국가리포지터리 - OA 학술지 - Transactions on Electrical and Electronic Materials - Integrated Circuit Design Based on Carbon Nanotube Field Effect Transistor
Band diagram of a double-gate ambipolar CNTFET: the fields A and B are
Stanford CNTFET Model in [32].
Electronics, Free Full-Text
Design and evaluation of energy-efficient carbon nanotube FET-based quaternary minimum and maximum circuits
PDF] High-Performance and Energy-Efficient CNFET-Based Designs for Ternary Logic Circuits
CNTFET design of a multiple-port ternary register file - ScienceDirect
Full article: Design of CNTFET-based 2-bit ternary ALU for nanoelectronics
Energy efficient design of unbalanced ternary logic gates and arithmetic circuits using CNTFET - ScienceDirect
A universal method for designing low‐power carbon nanotube FET‐based multiple‐valued logic circuits - Moaiyeri - 2013 - IET Computers & Digital Techniques - Wiley Online Library
A novel, efficient CNTFET Galois design as a basic ternary-valued logic field - Document - Gale Academic OneFile
Full article: A novel, efficient CNTFET Galois design as a basic ternary-valued logic field
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